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G00: Poster Session I (2pm-5pm PST)

Exhibit Hall (Forum Ballroom)

Sponsoring Units: APSSession Type:
  • Poster
  • Undergrad Friendly

Exhibit Hall (Forum Ballroom)

Any architecture for practical quantum computing must be scalable. An attractive approach is to create multiple cores, computing regions of fixed size that are well-spaced but interlinked with communication channels. This exploded architecture can relax the demands associated with a single monolithic device: the complexity of control, cooling and power infrastructure as well as the difficulties of cross-talk suppression and near-perfect component yield. Here we explore interlinked multicore architectures through analytic and numerical modelling. While elements of our analysis are relevant to diverse platforms, our focus is on semiconductor electron spin systems in which numerous cores may exist on a single chip within a single fridge. We model shuttling and microwave-based interlinks and estimate the achievable fidelities, finding values that are encouraging but markedly inferior to intra-core operations. We therefore introduce optimised entanglement purification to enable high-fidelity communication, finding that 99.5% is a very realistic goal. We then assess the prospects for quantum advantage using such devices in the NISQ-era and beyond: we simulate recently proposed exponentially-powerful error mitigation schemes in the multicore environment and conclude that these techniques impressively suppress imperfections in both the inter- and intra-core operations.

Presented By

  • Hamza Jnane (University of Oxford, Quantum Motion)


  • Hamza Jnane (University of Oxford, Quantum Motion)
  • Brennan Undseth (QuTech, TU Delft)
  • Balint Koczor (University of Oxford, Quantum Motion)
  • Zhenyu Cai (University of Oxford, Quantum Motion)
  • Simon C Benjamin (University of Oxford, Quantum Motion)