Fri. March 10, 1:30 p.m. – 1:42 p.m. PST
Room 403/404
Silicon-based quantum processors offer scaling advantages by combining a small qubit footprint with advanced semiconductor manufacturing, promising high density, uniform qubit arrays readily integrated with complementary metal-oxide-semiconductor (CMOS) technology. Here we characterise a maximally entangling gate on a two-electron spin state defined in a double quantum dot. The dots are hosted in a planar MOS structure in natural silicon, fabricated using a hybrid 300mm optical and electron beam lithography process. This is paired with fast readout via radio-frequency dispersive measurement, enabled by an off-chip 512 MHz superconducting resonator, allowing projective measurement of the two-electron spin states. We demonstrate coherent control via the exchange interaction to perform a √SWAP gate in ≤ 8 ns within a decay time of T2SWAP ≈ 400 ns, leading to a gate quality factor ≈ 25 at this control point. The combination of this maximally entangling gate with dispersive readout in a device manufactured using 300mm wafer scale processing presents a simultaneous demonstration of many of the key ingredients required for a scalable unit cell for a silicon-based quantum processor.
Presented By
- Jacob F Chittock-Wood (University College London; Quantum Motion)
Dispersively sensed entangling gate in silicon quantum dots fabricated on 300mm wafers
Fri. March 10, 1:30 p.m. – 1:42 p.m. PST
Room 403/404
Presented By
- Jacob F Chittock-Wood (University College London; Quantum Motion)