B46: Scaling Up Silicon Qubits - Characterization and Fab

Mon. March 4, 12:54 p.m. – 1:06 p.m. CST

200AB

Silicon/silicon-germanium (Si/SiGe) heterostructures have emerged as a prominant host material for electron spin qubits, with small-scale Si/SiGe devices achieving operation fidelities surpassing the error-correction threshold. Scaling this approach further, it is foreseeable that the reliance of qubit parameters on their atomistic environment will lead to inter-device fluctuations, which will significantly impede approaches like spin shuttling [1]. Hence, methods for minimizing temperature-activated diffusion and post-growth strain relaxation become crucial, as increasingly complex layer structures are being developed to improve parameters like valley splitting [2]. However, the current state of the art relies on globally raising the device temperature to electrically activate the ion-implanted Ohmic contacts, which compromises the carefully engineered layer stack in the active qubit region.

To address this challenge, we have devised a laser-based local annealing process for the recrystallization of ion-implanted contacts. This approach substantially reduces the thermal load on the active device area. Utilizing this process, we have successfully fabricated Hall bar structures, demonstrating electron mobility and contact resistance values that are as good as, or even superior to, those of a globally annealed reference sample.

[1] T. Struck, M. Volmer, L. Visser, T. Offermann, R. Xue, J.-S. Tu, S. Trellenkamp, Ł. Cywiński, H. Bluhm, and L. R. Schreiber, Spin-EPR-Pair Separation by Conveyor-Mode Single Electron Shuttling in Si/SiGe, http://arxiv.org/abs/2307.04897 (2023).

[2] M. P. Losert, M. A. Eriksson, R. Joynt, R. Rahman, G. Scappucci, S. N. Coppersmith, and M. Friesen, Practical Strategies for Enhancing the Valley Splitting in Si/SiGe Quantum Wells, http://arxiv.org/abs/2303.02499 (2023).