Mon. March 4, 3:00 p.m. – 3:36 p.m. CST
200G
State-of-the-art superconducting quantum processors heavily leverage the multi-chip architecture to enable larger and more complex circuitry. The challenge is to ensure that such an architecture does not degrade the device performance as we continue to scale to larger systems.
At the Chalmers University of Technology (Sweden), we employ a two-chip stack architecture where a qubit chip is flip-chip-bonded to a control chip. In a successful collaboration with VTT (Finland), we demonstrated flip-chip qubit devices with coherence and gate fidelity performances that are similar to our in-house single-chip devices. We have further scaled this integration technology to fully-packaged multi-qubit processors and demonstrated control-signal crosstalk with favourable behaviour.
In this talk, I will describe this flip-chip approach and highlight recent advances from the community. In particular, I will focus on lessons we learned from building quantum processors using this architecture: from design of single qubit all the way to the on-chip signal-delivery strategy, and discuss the technical challenges that lie ahead.
Presented By
- Sandoko Kosen (Chalmers University of Technology)
Building superconducting quantum processors in flip-chip architecture
Mon. March 4, 3:00 p.m. – 3:36 p.m. CST
200G
At the Chalmers University of Technology (Sweden), we employ a two-chip stack architecture where a qubit chip is flip-chip-bonded to a control chip. In a successful collaboration with VTT (Finland), we demonstrated flip-chip qubit devices with coherence and gate fidelity performances that are similar to our in-house single-chip devices. We have further scaled this integration technology to fully-packaged multi-qubit processors and demonstrated control-signal crosstalk with favourable behaviour.
In this talk, I will describe this flip-chip approach and highlight recent advances from the community. In particular, I will focus on lessons we learned from building quantum processors using this architecture: from design of single qubit all the way to the on-chip signal-delivery strategy, and discuss the technical challenges that lie ahead.
Presented By
- Sandoko Kosen (Chalmers University of Technology)