Sponsoring Units: DQIChair: Long Nguyen, University of California, Berkeley
Thu. March 7, 3:24 p.m. – 3:36 p.m. CST
200CD
qLDPC (Quantum Low Density Parity Check) codes offer a way to drastically reduce the number of physical qubits for a given number of logical qubits and a targeted logical error rate compared to the more studied surface code. However, implementing these codes requires more advanced hardware especially in terms of qubit connectivity. In this talk, we study LDPC codes for biased-noise qubits and how their implementation compares to the hardware requirements of LDPC codes for standard qubits.
Presented By
Diego Ruiz (Alice&Bob - Inria)
Authors
Diego Ruiz (Alice&Bob - Inria)
Anthony Leverrier (Inria Paris)
Jérémie Guillaud (Alice&Bob)
Mazyar Mirrahimi (Laboratoire de Physique de l'Ecole normale supérieure, ENS-PSL)
Christophe Vuillot (Université de Lorraine, CNRS, Inria, LORIA)
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Low-overhead quantum processor using concatenated bosonic-LDPC codes
Thu. March 7, 3:24 p.m. – 3:36 p.m. CST
200CD
qLDPC (Quantum Low Density Parity Check) codes offer a way to drastically reduce the number of physical qubits for a given number of logical qubits and a targeted logical error rate compared to the more studied surface code. However, implementing these codes requires more advanced hardware especially in terms of qubit connectivity. In this talk, we study LDPC codes for biased-noise qubits and how their implementation compares to the hardware requirements of LDPC codes for standard qubits.
Presented By
Diego Ruiz (Alice&Bob - Inria)
Authors
Diego Ruiz (Alice&Bob - Inria)
Anthony Leverrier (Inria Paris)
Jérémie Guillaud (Alice&Bob)
Mazyar Mirrahimi (Laboratoire de Physique de l'Ecole normale supérieure, ENS-PSL)
Christophe Vuillot (Université de Lorraine, CNRS, Inria, LORIA)